Heimdall
Joined: 10 Nov 2005
Posts: 259
Location: Netherlands
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 Posted: Tue Sep 01, 2009 11:39 pm Post subject: need some ASM help with "bitrev" |
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I've been studying the mips_opcode struct from binutils:
| Code: | struct mips_opcode
{
/* The name of the instruction. */
const char *name;
/* A string describing the arguments for this instruction. */
const char *args;
/* The basic opcode for the instruction. When assembling, this
opcode is modified by the arguments to produce the actual opcode
that is used. If pinfo is INSN_MACRO, then this is 0. */
unsigned long match;
/* If pinfo is not INSN_MACRO, then this is a bit mask for the
relevant portions of the opcode when disassembling. If the
actual opcode anded with the match field equals the opcode field,
then we have found the correct instruction. If pinfo is
INSN_MACRO, then this field is the macro identifier. */
unsigned long mask;
/* For a macro, this is INSN_MACRO. Otherwise, it is a collection
of bits describing the instruction, notably any relevant hazard
information. */
unsigned long pinfo;
/* A collection of additional bits describing the instruction. */
unsigned long pinfo2;
/* A collection of bits describing the instruction sets of which this
instruction or macro is a member. */
unsigned long membership;
};
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and saw that the binutils patch defines the asm instruction bit rev as:
{"bitrev", "d,t", 0x7c000520, 0xffe007ff, WR_d|RD_t, 0,...},
however the latest binutils already contains this instruction and is defined as:
{"bitrev", "d,t", 0x7c0006d2, 0xffe007ff, WR_d|RD_t, 0,...},
so the match is different and now i'm confused, do the new mips processors supported by binutils have a different match for the bitrev instruction, or does the psp patch is using a wrong match? |
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