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How should this be placed in a makefile?

 
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vivi



Joined: 08 Jul 2009
Posts: 7

PostPosted: Wed Jul 08, 2009 8:37 am    Post subject: How should this be placed in a makefile? Reply with quote

Hi, this compiles and works fine, but I'm not sure how to put this into a Makefile.

Code:

spu-gcc-4.3 spe_example.c -o spe_example;
embedspu test_handle spe_example spe_example_csf.o;
gcc ppe_example.c spe_example_csf.o -lspe2 -o example;

Here is my attempt so far

Code:

CC=gcc
CFLAGS=-g -Wall
SPUGCC=spu-gcc-4.3

example: ppe_example.c spe_example_csf.o
    $(CC) $(CFLAGS) ppe_example.c spe_example_csf.o -lspe2 -o example
    embedspu test_handle spe_example spe_example_csf.o

spe_example: spe_example.c
    $(SPUGCC) spe_example.c -o spe_example       

clean:
    rm -rf spe_example_csf.o example spe_example


With regards to it's background, It's just some test code using all the cores on the PS3

http://www.ibm.com/developerworks/library/pa-libspe2/

(Ignore the differences, much to my annoyance i found that Debian has different naming conventions from what was written in the guide.)

Thanks!
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jimparis



Joined: 10 Jun 2005
Posts: 1179
Location: Boston

PostPosted: Thu Jul 09, 2009 5:24 am    Post subject: Reply with quote

this three step process
Code:

spu-gcc-4.3 spe_example.c -o spe_example
embedspu test_handle spe_example spe_example_csf.o
gcc ppe_example.c spe_example_csf.o -lspe2 -o example;

would be expressed in a Makefile as three dependency rules:
Code:
all:
        example

spe_example: spe_example.c
        spu-gcc-4.3 spe_example.c -o spe_example

spe_example_csf.o: spe_example
        embedspu test_handle spe_example spe_example_csf.o

example: ppe_example.c spe_example_csf.o
        gcc ppe_example.c spe_example_csf.o -lspe2 -o example
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vivi



Joined: 08 Jul 2009
Posts: 7

PostPosted: Fri Jul 10, 2009 1:57 am    Post subject: Reply with quote

hmm, recieving error 127 when i try to use that makefile. I'm baffled, does anyone have any more attempts. Placing the commands

Code:
spu-gcc-4.3 spe_example.c -o spe_example
embedspu test_handle spe_example spe_example_csf.o
gcc ppe_example.c spe_example_csf.o -lspe2 -o example;


in an sh file feels and seems sloppy, so i would really like to be able to find out how it is placed in a makefile. Thanks for your help so far jimparis ^^
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J.F.



Joined: 22 Feb 2004
Posts: 2906

PostPosted: Fri Jul 10, 2009 4:00 am    Post subject: Reply with quote

The makefile shown IS the proper way to do it. You just need to figure out what the error is... probably a whitespace problem. Make doesn't like leading spaces - only leading tabs are allowed. Look for any lines that start with one or more spaces and replace them with tabs.
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jimparis



Joined: 10 Jun 2005
Posts: 1179
Location: Boston

PostPosted: Fri Jul 10, 2009 4:34 am    Post subject: Reply with quote

Sorry, that first rule should be
Code:
all: example

not
Code:
all:
        example
Also, what JF said.
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vivi



Joined: 08 Jul 2009
Posts: 7

PostPosted: Wed Jul 29, 2009 3:51 am    Post subject: Reply with quote

Came back to it later and and solved it after reading more about creating makefiles and playing around. I think that the problem was that the makefiles suggested were in reverse. Here is the working copy which includes am extra spe program. Thanks for the help :)
Code:

CC = gcc -Wall
SPU-GCC = spu-gcc-4.3
ESPU = embedspu
DEBUG = -ggdb3

example: ppe_example.c spe_example_csf.o spe_example_csf2.o
   $(CC) ppe_example.c spe_example_csf.o spe_example_csf2.o -lspe2 -o example

spe_example_csf2.o: spe_example2
   $(ESPU) test_handle_2 spe_example2 spe_example_csf2.o
   
spe_example_csf.o: spe_example
   $(ESPU) test_handle spe_example spe_example_csf.o   

spe_example2:
   $(SPU-GCC) spe_example2.c -o spe_example2

spe_example:
   $(SPU-GCC) spe_example.c -o spe_example

clean:
   rm spe_example spe_example2 spe_example_csf2.o spe_example_csf.o example

 
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jimparis



Joined: 10 Jun 2005
Posts: 1179
Location: Boston

PostPosted: Wed Jul 29, 2009 4:52 am    Post subject: Reply with quote

The rule order doesn't actually if the Makefile expresses all of the dependencies correctly. Yours is almost correct, but you forgot to list spu_example.c as a dependency of spu_example. Similarly for spu_example2.
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vivi



Joined: 08 Jul 2009
Posts: 7

PostPosted: Thu Jul 30, 2009 11:44 am    Post subject: Reply with quote

Ah, yeah should have wrote the dependancies. It still compiled without them though. Is including the source files as dependencies just to make it easier for the human programmer?
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jimparis



Joined: 10 Jun 2005
Posts: 1179
Location: Boston

PostPosted: Tue Aug 11, 2009 1:51 pm    Post subject: Reply with quote

Including all dependencies is done so that "make" works correctly. As you noticed, without proper dependencies, it can fail if (for example) the rules are in a different order.
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